The electrical characteristics of metal-oxide-semiconductor (MOS) transistors are known to be affected by exposure to ionizing radiation of sufficient dose and energy. One of the effects of such radiation is the shift of the threshold voltage of the MOS transistor due to charge trapping in dielectric layers, and to the generation of surface states at the semiconductor-dielectric interface. These effects of ionizing radiation occur not only at the relatively thin gate dielectric of the MOS transistor, but also at the thicker dielectric layers used to isolate transistors from one another. The shift of the flatband voltage of an MOS capacitor from a given level of ionizing radiation is known to depend strongly on the thickness of the dielectric layer (i.e., is proportional to the second or third power of the dielectric thickness). Accordingly, a transistor with a thicker dielectric will have its threshold voltage affected to a greater extent than a similarly sized transistor with a thinner dielectric.
A parasitic MOS transistor is formed at locations of an integrated circuit where the gate electrode (or any conductor) overlaps the isolation dielectric. For example, a parasitic sidewall transistor is formed in parallel to a thin gate MOS transistor as the gate electrode leaves the moat region and extends onto the isolation dielectric layer. The strong dependency of the threshold voltage shift due to radiation on dielectric thickness can cause the threshold voltage of the parasitic transistor to shift to a greater degree than that of the operating transistor, increasing the likelihood of source-to-drain conduction through a channel under the isolation dielectric rather than through the operating transistor. For a sufficiently high radiation dose, the threshold voltage of the parasitic transistor can fall below the threshold voltage of the operating transistor, causing source-to-drain leakage for a transistor which would otherwise be in the off state.
It is therefore an object of this invention to provide an insulated-gate field effect transistor having an isolation scheme with improved tolerance to threshold voltage shifts from ionizing radiation.
It is another object of this invention to provide such a transistor which can be fabricated with a minimum of additional masking steps.
It is another object of this invention to provide such a transistor which can be fabricated in conjunction with silicide-cladding of the source and drain diffusions.
Other objects and advantages of the invention will become apparent to those of ordinary skill in the art having reference to this specification and the accompanying drawings.